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- To: email@example.com
- Subject: Microprocessor Help
- From: Sandor Nagyhazi <firstname.lastname@example.org>
- Date: Thu, 20 Apr 2000 16:30:55 +0100
- Delivery-Date: Thu Apr 20 08:22:06 2000
- Organization: Netscape Online member
To whom it may concern,
I am a first year student studying Microprocessing and I am having
trouble understanding memory addressing inside the 8086. For example how
it would it be possible to show a 1024 * 8-bit RAM may be obtained using
four 256 * 8-bit RAM chips, assuming that a 1 out of 4 decoder is
available and the address bus is 16 bit and the data bus is 8 bit, The
data and address bus are not multiplexed. How would it be possible to
state so they start at address 0H and allowing foldback does not occur.
I am having a lot of problem understanding this even though I am reading
and reading but can't seem to understand the whole picture. Please could
you explain this if possible or direct me to a site that his this type
of information or even recommend a good book on microprocessing.
Currently I have 'Microprocessors and Interfacing' by Douglas V. Hall.
Any help on this and resources you could offer me would be greatly